Address translation with storage protection

Details Address translation with storage protection Address translation with storage protection

1976-12-27

1978-06-06

Thomas, James D.

Boots, shoes, and leggings

G06F 1300, G06F 920

Patent

active

040939863

ABSTRACT:
Storage protection is provided in a computer system having address translation by loading address translate registers with valid translated addresses and with special addresses. A circuit for generating a storage exception signal is connected to receive all addresses from the translate registers which are addressed by the main storage address and generates a storage exception signal in response to detecting a special address. The address translation mode is provided for both a main storage processor and a control processor with a separate address translate control register for each processor. Address translation is automatically selected based upon interrupt level. Address translation registers are also provided for I/O operations and are controlled independently from and can be in parallel with the task address translation registers.

REFERENCES:
patent: 3528062 (1970-09-01), Lehman
patent: 3530438 (1970-09-01), Mellen
patent: 3839706 (1974-10-01), Borchsenius
patent: 3909798 (1975-09-01), Wallach
patent: 3938096 (1976-02-01), Brown
patent: 3970999 (1976-07-01), Elward
patent: 4017839 (1977-04-01), Calle

Affiliated with

Also associated with

Rating

Address translation with storage protection does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Address translation with storage protection, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Address translation with storage protection will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1495948