Address translation system with register storing section and are

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Details

395425, 3642563, 3642564, 364DIG1, G06F 1208, G06F 1210

Patent

active

051931605

ABSTRACT:
An address translation system for converting into a real address a virtual address including a virtual section number, a virtual area number and a virtual page number, comprises a plurality of stages of tables including at least area tables and page tables, a translation look-aside buffer having a plurality of entries each storing a virtual section number, a virtual area number and a virtual page number, an area preservation register for preserving a virtual section number and a virtual area number of a given virtual address when a new entry is registered into the translation look-aside buffer, a table register for preserving an output of an area table selected when the new entry is registered into the translation look-aside buffer, and an area comparator for comparing a content of the area preservation register with a virtual section number and a virtual area number of a given virtual address. When the translation look-aside buffer is retrieved on the basis of the given virtual address, if an entry having the same virtual section number, virtual area number and virtual page number as those of the given virtual address is not found, the area comparator is used for comparing the content of the area preservation register with the virtual section number and the virtual area number of the given virtual address. If coincidence is detected by the comparator, an address translation is performed by accessing a page table on the basis of the page table information preserved in the page table register, without accessing the area table.

REFERENCES:
patent: 4170039 (1979-10-01), Beacom et al.
patent: 4792897 (1988-12-01), Gotou et al.
patent: 4922415 (1990-05-01), Hemdal
patent: 4961135 (1990-10-01), Uchihori
patent: 5077654 (1991-12-01), Ohtsuki
patent: 5077826 (1991-12-01), Grohoski et al.
patent: 5099415 (1992-03-01), Osler et al.

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