Address translation system for use in a simulation environment

Details Address translation system for use in a simulation environment Address translation system for use in a simulation environment

2011-06-07

2011-06-07

Proctor, Jason (Department: 2123)

Data processing: structural design, modeling, simulation, and em

Simulating electronic device or electrical system

Computer or peripheral device

C716S030000

Reexamination Certificate

active

07957951

ABSTRACT:
Methods and systems for simulation of a testable system are provided in which a virtual testable system is used. One method includes inputting a system definition file into a translation utility, where the system definition file includes a plurality of physical addresses required for execution of the system definition file in the testable system. The method also includes inputting a memory map file into the translation utility, the memory map representing a virtual memory space for a virtual testable system. The method further includes generating virtual translation information by translating the physical addresses into virtual addresses using the memory map file.

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