Static information storage and retrieval – Addressing – Sync/clocking
Patent
1996-10-21
1998-01-06
Nelms, David C.
Static information storage and retrieval
Addressing
Sync/clocking
36523008, 365194, 326 93, 327175, 327176, G11C 800
Patent
active
057062463
ABSTRACT:
An address transition detection circuit for driving an internal circuit of a memory device, includes an address input circuit for generating an input logic operation signal by a logic operation of a chip select signal and an address signal, a latch circuit for generating first and second latch signals, a feedback circuit for generating a feedback signal, first and second delay circuits for generating first and second delay signals by delaying the first and second latch signals for a prescribed delay time, and an address transition detection signal output circuit for receiving the first and second latch signals and the first and second delay signals, and generating an address transition detection signal having a pulse width longer than at least the twice the prescribed delay time of the first or second delay circuit when the address signal changes, thereby preventing malfunction of the memory device.
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Choi Kyun-Kyu
Jeon Yong-Weon
Le Vu A.
LG Semicon Co. Ltd.
Nelms David C.
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