Address transition detection (ATD) circuit for asynchronous VLSI

Static information storage and retrieval – Addressing – Sync/clocking

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365194, 327 14, G11C 800

Patent

active

055661300

ABSTRACT:
A logic filtered address transition detection circuit that receives a chip select signal and an ATD pulse, and which produces an internal clock pulse using:
an AND gate, a filtered input terminal, a delay unit and a comparator unit. The AND gate outputs an AND logic signal after processing the chip select signal and ATD pulse, the filtered input terminal and delay unit both receive the AND logic signal from the AND gate; and send their signals to the comparator unit. The comparator unit performs a logic function on the AND logic signal and a delayed AND logic signal to produce the internal clock signal.

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patent: 5493538 (1996-02-01), Bergman

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