Static information storage and retrieval – Addressing – Sync/clocking
Patent
1995-07-25
1996-12-31
Zarabian, A.
Static information storage and retrieval
Addressing
Sync/clocking
36518911, G11C 800
Patent
active
055900895
ABSTRACT:
An address transition detection (ATD) circuit for use in a memory generates a first pulse in a first node in response to a change in state of an address signal and generates a second pulse in a second node in response to a change in state of the address signal. A load circuit accelerates assertion of the first pulse in response to assertion of the second pulse and accelerates deassertion of the first pulse in response to deassertion of the second pulse.
REFERENCES:
patent: 4636991 (1987-01-01), Flannagan
patent: 4710904 (1987-12-01), Suzuki
patent: 4893282 (1990-01-01), Wada
patent: 5243575 (1993-09-01), Sambandan et al.
Micron Quantum Devices Inc.
Zarabian A.
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