Address space manipulation in a processor

Details Address space manipulation in a processor Address space manipulation in a processor

1994-09-30

1997-12-16

Moore, David K.

395401, 395402, 395413, 395416, 395419, G06F 1200, G06F 1202, G06F 1206, G06F 1210

Patent

active

056995423

ABSTRACT:
A method and apparatus for configuring the address space of a computer is described. According to the present invention, a computer system has a full address space and includes at least one base unit, at least one expansion unit and a microprocessor core. The microprocessor core issues access addresses. The full address space includes a base address space and an expanded address space. The base address space is addressed by an M bit address and the expanded address space is addressed by an N bit address (N.gtoreq.M). Each base unit is mapped to an address within the base address space, and the base unit address is mirrored in the expanded address space. Each expansion unit is mapped to an address within the expanded address space. An address configuration circuit in the computer system includes an address space remapping circuit for selectively remapping or not remapping base units out of the base address space. The address configuration circuit also includes an expanded space enabling circuit for selectively enabling or disabling the expanded address space. Expansion units are accessible in the expanded address space depending upon whether the expanded address space has been enabled.

REFERENCES:
patent: 5187792 (1993-02-01), Dayan et al.
patent: 5237669 (1993-08-01), Spear et al.
Pranav Mehta, "Introducing Intel's Family of Embedded Intel 386.TM. Microprocessors," (AP-499, Application Note), Feb., 1994.
Pranav Mehta, "Introducing Intel's Family of Embedded Intel386.TM. Microprocessors," (AP-499, Application Note), Sep. 1993.
Pranav Mehta, "Introducing Intel's Family of Embedded Intel386.TM. Microprocessors," (AP-499) Feb. 1994.

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