Address receiving circuit for a semiconductor apparatus

Static information storage and retrieval – Addressing – Particular decoder or driver circuit

Reexamination Certificate

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Details

C365S233100, C365S233120, C365S233140, C365S233150

Reexamination Certificate

active

08059483

ABSTRACT:
An address receiving circuit for a semiconductor apparatus includes a controller that, in response to a semiconductor apparatus initialization-related command, generates a control signal having an activation cycle corresponding to the standard of cycle time of the semiconductor apparatus initialization-related command, and an address buffer that receives an address according to the control signal.

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