Patent
1996-06-10
1997-03-18
Shin, Christopher B.
395821, 395280, 395306, 395840, G06F 1200, G06F 1300
Patent
active
056131577
ABSTRACT:
A system and method for accessing a multiplicity of memory devices connected to a serial bus of defined protocol and which a direct memory device selection range smaller than the number of memory devices. The memory devices are divided among microcontrollers which selectively enable one or more memory devices responsive to higher level addressing signals sent to the microcontrollers. Thereafter, selectively enabled groups of memory devices are accessed by applying the limited addressing range of the serial bus. The invention finds particular use in modularized systems where cost and complexity are significant considerations by extending the normal range of the chip select function to increase the memory device count beyond the standard bus protocol. A preferred embodiment uses EEPROM devices and an I.sup.2 C protocol bus.
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Signetics Philips Semiconductors, Jan. 1992, "The I.sup.2 C-bus and How to Use it", pp. 1-23.
Davidson Joel R.
Li Hehching H.
Liu Franklin M.
International Business Machines - Corporation
Salys Casimer K.
Shin Christopher B.
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