Data processing: structural design – modeling – simulation – and em – Emulation
Reexamination Certificate
2007-01-16
2007-01-16
Jones, Hugh (Department: 2128)
Data processing: structural design, modeling, simulation, and em
Emulation
C712S244000
Reexamination Certificate
active
10301887
ABSTRACT:
An memory access address comparator includes two comparators comparing an input memory access address with respective reference addresses. The comparators produce a match indication on selectable criteria, such as address size, full or partial overlap, greater than, less than, equal to, not equal to, less than or equal to, and greater than or equal to, and can be selectively chained. Input multiplexers permit memory access address bus selection. The comparator output may be selectively dependent upon corresponding data matches. The reference addresses, comparison data and control functions are enabled via central processing unit accessible memory mapped registers.
REFERENCES:
patent: 5448705 (1995-09-01), Nguyen et al.
Flores Jose L.
Gill Maria B. H.
Nardini Lewis
Alhija Saif
Brady W. James
Jones Hugh
Marshall, Jr. Robert D.
Telecky , Jr. Frederick J.
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