Address input buffer with signal converter

Details Address input buffer with signal converter Address input buffer with signal converter

1997-10-06

1998-12-29

Nelms, David

Static information storage and retrieval

Addressing

Multiplexing

36523008, G11C 800

Patent

active

058547690

ABSTRACT:
An address input buffer for a semiconductor memory device comprising an address buffering circuit fox buffering at least two external address signals A1 and A2, at least two output terminals for outputting the external address signals A1 and A2 buffered by the address buffering circuit as internal address signals AI.sub.-- 1 and AI.sub.-- 2, respectively, a multiplexing circuit connected between the address buffering circuit and the output terminals, for selectively transferring the external address signals A1 and A2 buffered by the address buffering circuit to the output terminals, and a multiplexing control circuit for controlling the multiplexing circuit. According to the present invention, the address input buffer for the semiconductor memory device can convert the external address signals in such a manner that memory cells in the memory device can fairly be accessed.

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patent: 5689457 (1997-11-01), Shimohigashi et al.
patent: 5691953 (1997-11-01), Yeh et al.

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