Address indication circuit capable of relatively shifting channe

Details Address indication circuit capable of relatively shifting channe Address indication circuit capable of relatively shifting channe

1984-04-26

1986-10-21

Zache, Raulfe B.

Boots, shoes, and leggings

G06F 1200

Patent

active

046189424

ABSTRACT:
In an address indication circuit for use in indicating memory addresses of a random access memory to provide delays necessary for successive channels, channel addresses are determined relative to the memory addresses by assigning a reference number to a leading one of the channels and by successively accumulating the reference number and numbers determined for the delays to decide results of accumulation as the remaining channel addresses. The respective channel addresses are stored in a read-only memory (80) and added by an adder (83) to a base address variable at every time interval to provide memory addresses. When the memory addresses are equal in number to a preselected number, the base address may be produced by a counter (81) carrying out operation between zero and the preselected number less one. The adder adds the reference number to the base address modulo the preselected number.

REFERENCES:
patent: 4459661 (1984-07-01), Kaneda et al.

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