Address generator with variable scan patterns

Details Address generator with variable scan patterns Address generator with variable scan patterns

1988-06-07

1989-11-28

Clark, David L.

Boots, shoes, and leggings

364518, 340736, G06F 1562

Patent

active

048842206

ABSTRACT:
An apparatus for reading a first addressable memory and writing into a second addressable memory wherein the first addressable memory is logically arranged in a rectangular matrix and is scanned at an arbitrary angle with respect to the matrix for producing a plurality of scan patterns whose parameters can be altered and controlled by an external source, while the second addressable memory, also arranged in a rectangular matrix, is written into along parallel rows and columns. The apparatus is particularly adapted for use with a digital map display system having an airborne computer for generation the scan parameters.

REFERENCES:
patent: 4228432 (1980-10-01), Osborne
patent: 4387370 (1983-06-01), Katagi
patent: 4511962 (1985-04-01), Machida
patent: 4660157 (1987-04-01), Beckwith et al.
patent: 4742343 (1988-05-01), O'Donnell
patent: 4841292 (1989-06-01), Zemo

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