Address generator

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Details

371 19, 307 49, 364770, G06F 1200, G06F 1500

Patent

active

047409142

ABSTRACT:
An address generator which provides addresses for machine storage and software retrieval of computer status information. A counter is used to generate address signals in a descending order until it is disabled by a computer during alarm conditions. Under such conditions the counter provides a bias address for referencing the most recent status word. A gating circuit gates computer generated address signals to an adder circuit during the alarm conditions. The adder circuit adds the computer generated address signals to the counter generated bias signal to provide address signals which reference physical storage locations in a memory.

REFERENCES:
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patent: 4016543 (1977-04-01), Franks et al.
patent: 4138732 (1979-02-01), Suzuki et al.
patent: 4176394 (1979-11-01), Kaminski et al.
patent: 4354229 (1982-10-01), Davis et al.
patent: 4570161 (1986-02-01), Kummer et al.
patent: 4628477 (1986-12-01), Burrows
patent: 4641260 (1987-02-01), Fukukita et al.

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