Address distribution in data storage apparatus

Details Address distribution in data storage apparatus Address distribution in data storage apparatus

1985-01-11

1986-12-09

Fleming, Michael R.

Excavating

371 21, G06F 1110

Patent

active

046285121

ABSTRACT:
In a data storage apparatus, memory chips are arranged in groups, each group having an address bus which is connected to the address inputs of all the chips in that group. Each address bus is terminated at both ends by circuits which perform the dual function of suppressing reflections and checking the addresses.
Because reflections are suppressed, the time taken to address the store is reduced. One of the termination circuits in each group is arranged to compare the address on the bus with that on the bus in the adjacent group; the other circuit compares the address with a predetermined value.

REFERENCES:
patent: 3944800 (1976-03-01), Beck
patent: 3982111 (1976-09-01), Lerner
patent: 4031523 (1977-06-01), Horsten
patent: 4245344 (1981-01-01), Richter
patent: 4400792 (1983-08-01), Strelow

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