Address decoder

Details Address decoder Address decoder

1976-12-06

1978-04-25

Anagnos, Larry N.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307205, 307215, 307DIG5, 365230, G11C 800, H03K 1908, H03K 1920, H03K 1704

Patent

active

040865002

ABSTRACT:
An address decoder comprises an OR circuit and a NOR circuit, the OR circuit having switching transistors to which decoder inputs and a chip enable signal are applied, a load transistory and a transistor for precharging a common precharge node by the complementary chip enable signal. The output of this OR circuit is applied to the NOR circuit with the complementary chip enable signal, the set-up time of the decoder or the NOR circuit being independent of the number of decoder inputs.

REFERENCES:
patent: 3644904 (1972-02-01), Baker
patent: 3721838 (1973-03-01), Brickman et al.
patent: 3778782 (1973-12-01), Kitagawa
patent: 3778784 (1973-12-01), Karp et al.
patent: 3863230 (1975-01-01), Regitz et al.
patent: 3906461 (1975-09-01), Cappon
patent: 3911428 (1975-10-01), Chin
patent: 3959781 (1976-05-01), Mehta et al.

Affiliated with

Also associated with

Rating

Address decoder does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Address decoder, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Address decoder will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2421267