Address decode

Static information storage and retrieval – Addressing – Particular decoder or driver circuit

Reexamination Certificate

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Details

C365S230030, C365S230010

Reexamination Certificate

active

06888777

ABSTRACT:
Machine-readable media, methods, and apparatus are described which process memory transactions. In some embodiments, a processor or other external components provide a memory controller with decoded memory addresses. The memory controller then may access the memory with the processor decoded address without decoding the address itself. In other embodiments, a processor or other external components provide a memory controller with partially decoded memory addresses. The memory controller then generates a decoded address from the partially decoded address and may access the memory with the generated decoded address.

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