Address counter test mode for memory device

Details Address counter test mode for memory device Address counter test mode for memory device

1998-06-29

2000-06-20

Wambach, Margaret R.

Electrical pulse counters, pulse dividers, or shift registers: c

Applications

Including memory

377 19, 377116, 365236, G06M 300

Patent

active

06078637&

ABSTRACT:
A memory having a circuit including a built-in address counter with a test mode. The address counter may be used to generate the memory array addressing for the different array test patterns. The circuit may comprise a logic circuit and a counter circuit. The logic circuit may be configured to generate one or more control signals in response to one or more control inputs. The counter circuit may be configured to generate a first counter output and a second counter output in response to (i) the control outputs and (ii) one or more inputs. The counter may comprise a first portion configured to generate the first counter output and a second portion configured to generate the second counter output.

REFERENCES:
patent: 5479466 (1995-12-01), Kim
patent: 5799053 (1998-08-01), Park

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