Static information storage and retrieval – Addressing – Counting
Reexamination Certificate
2008-07-03
2010-02-23
Nguyen, Tuan T (Department: 2824)
Static information storage and retrieval
Addressing
Counting
C365S219000, C365S230080, C365S233110
Reexamination Certificate
active
07668039
ABSTRACT:
An address counter includes FIFO units and first and second command counters that control the groups. The first command counter has a first mode in which any one of input gates is conducted in response to a first internal command and a second mode in which a plurality of input gates are conducted in response to an internal command. The second command counter has a first mode in which any one of output gates is conducted in response to one of second and third internal commands and second mode in which corresponding output gates are each conducted in response to one of the second and third internal commands. Thereby, when tCCD is small, the first mode can be selected, and when the tCCD is large, the second mode can be selected.
REFERENCES:
patent: 5999458 (1999-12-01), Nishimura et al.
patent: 6856270 (2005-02-01), Farmer et al.
patent: 6914829 (2005-07-01), Lee
patent: 7426144 (2008-09-01), Fujisawa
patent: 2008/0049541 (2008-02-01), Fujisawa
patent: 2007-102936 (2007-04-01), None
Song et al., “A 1.2Gb/s/pin Double Data Rate SDRAM with On-Die-Termination”, ISSCC 2003/Session 17/SRAM and DRAM/Paper 17.8, (U.S.A.), IEEE, 2003, p. 314.
Elpida Memory Inc.
Nguyen Hien N
Nguyen Tuan T
Sughrue & Mion, PLLC
LandOfFree
Address counter, semiconductor memory device having the... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Address counter, semiconductor memory device having the..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Address counter, semiconductor memory device having the... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4175046