Address conversion unit for data processing system

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G06F 920

Patent

active

042964687

ABSTRACT:
An address conversion method and unit for a data processing system is disclosed which converts logical addresses into physical addresses representative of plural addressable storage locations. Each instruction includes a portion indicative of a first or second kind of instruction. In the case where an instruction is of the first kind, the content of a register in a first base register arrangement specified by the instruction is added with an address part of the instruction to produce a logical address. In the case where an instruction is of the second kind, on the other hand, the content of a register in a second base register arrangement specified by the instruction different from the first base register arrangement is juxtaposed with an address part of the instruction to produce a logical address.

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