Address conversion apparatus

Details Address conversion apparatus Address conversion apparatus

1987-09-24

1990-03-20

Shaw, Gareth D.

Boots, shoes, and leggings

G06F 1210

Patent

active

049106686

ABSTRACT:
An address conversion apparatus includes a content addressable memory for storing a plurality of logical addresses, and a random access memory for storing a plurality of physical addresses corresponding to the logical addresses. When an input logical address is received, a search is conducted to find the same logical address stored in the memory. When the same logical address is found, the content addressable memory causes the random access memory to output a corresponding physical address. The content addressable memory includes a plurality of logical address storage units. Each unit has a plurality of data bit cells for storing address data and a process identification number cell for storing a process identification number. Thereby, a plurality of logical addresses which correspond to different processes are stored in the single content addressable memory.

REFERENCES:
patent: 4296475 (1981-10-01), Nederlof et al.
patent: 4433389 (1984-02-01), York et al.
patent: 4538241 (1985-08-01), Levin et al.
patent: 4607331 (1986-08-01), Goodrich, Jr. et al.
patent: 4785398 (1988-11-01), Joyce et al.

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