Address computation system for updating starting addresses of da

Details Address computation system for updating starting addresses of da Address computation system for updating starting addresses of da

1984-08-15

1987-11-03

Heckler, Thomas M.

Boots, shoes, and leggings

G06F 900

Patent

active

047046805

ABSTRACT:
An address computation system for updating starting addresses of data arrays in an array processor within an instruction cycle. A first set of registers is provided for storing starting addresses for each array. A second set of registers is provided for storing current addresses for each array. Logic is provided for initially providing, at the beginning of a series of computation steps to be executed repetitively, an address from a register in the first set of registers, changing that address, and storing it back in the same register and in a corresponding register in the second set, thereby updating the starting address for the next repetition of those computational steps while advancing the current address to the second of those steps.

REFERENCES:
patent: 4314333 (1982-02-01), Shibayama et al.
patent: 4365292 (1982-12-01), Barnes et al.
patent: 4439827 (1984-03-01), Wilkes
RCA Product Specification Sheet for ATMAC Microprocessor "Microcomputer With 32-Bit Arithmetic Does High-Precision Number Crunching", Electronics, Feb. 24, 1982, pp. 105-110, Written by: K. McDonough, E. Caudel, S. Magar, and A. Leigh.
"A Microcomputer with Digital Signal Processing Capability", IEEE International Solid-State Circuits Conference, Feb. 10, 1982, By: S. Magar, Edward R. Caudel and Anthony Leigh, p. 32.
"16-Bit Bipolar Microprocess or Has On-Chip Multiply and Divide", By: Gary Burke, Shai Mor, and Ashok Suri, Journal of Semiconductor Progress, 1st Qtr., 1982, Published by: Fairchild Semiconductor.

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