Address bus switching between sequential and non-sequential ROM

Details Address bus switching between sequential and non-sequential ROM Address bus switching between sequential and non-sequential ROM

1991-07-31

1995-03-07

Harvey, Jack B.

G06F 1200, G06F 1316

Patent

active

053966066

ABSTRACT:
A hand held electronic data processing device has an input keyboard and a display screen. A sixteen bit central processing unit (CPU) address bus addresses read only memory (ROM) and random access memory (RAM). However, a twenty bit register provides a twenty line address bus that is employed for addressing sequential data in ROM. A direct memory access (DMA) unit provides direct transfer of data from RAM to a forty bit register which controls the state of the pixels in a 240 character liquid crystal display (LCD). The keyboard is connected in an electronic matrix with rows driven by signals applied by system address bus lines. These various functions require exclusive use of the system address bus. Accordingly an address selector is employed to determine which of the functions is to capture the system address bus; the functions being (a) CPU address of ROM and RAM, (b) Register sequential address of ROM, (c) DMA address of RAM for delivery to LCD display, and (d) the driving of the rows of the keyboard matrix.

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patent: 4803618 (1989-02-01), Ita et al.
patent: 4862166 (1989-08-01), Yamakawa

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