Address buffer circuit

Details Address buffer circuit Address buffer circuit

1981-02-13

1983-07-12

Popek, Joseph A.

Static information storage and retrieval

Powering

Conservation of power

365230, 365174, 3072383, G11C 1140

Patent

active

043934803

ABSTRACT:
An address buffer circuit which generates a pair of complementary signals for selecting a memory cell according to an address input signal is disclosed. This address buffer circuit comprises a short circuit device connected between a pair of output terminals for the complementary signals. During the stand-by period of a memory, the short circuit device electrically connects the pair of output terminals, so that the potential of both of the pair of output terminals becomes an intermediate level between high and low levels provided at the output terminals during the active period of the memory.

REFERENCES:
patent: 4272834 (1981-06-01), Noguchi et al.

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