Address assignment system for image memory

Details Address assignment system for image memory Address assignment system for image memory

1985-09-05

1988-05-17

Harkcom, Gary V.

Boots, shoes, and leggings

364519, G06F 700

Patent

active

047455764

ABSTRACT:
According to an image memory address assignment system, a frame memory is divided into a plurality of blocks. Upper bits of the address of the frame memory constitute a block address, and lower bits constitute an intrablock address. The block address is supplied to an address converter. The address converter has a conversion pattern ROM. The conversion pattern ROM stores conversion patterns each converting the input write address signal block address to a block address for a completely read block area so as to perform simultaneous read and write access even if the data read direction (order) of the frame memory is different from the data write direction. The address converter supplies the write block address to the frame memory. As a result, the data can be written in the completely read block.

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IBM Technical Disclosure Bulletin, vol. 24, No. 4, Sep. '81, pp. 1938-1939, "Character Position Control Apparatus".

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