Additive digital predistortion system employing parallel...

Details Additive digital predistortion system employing parallel... Additive digital predistortion system employing parallel...

2008-03-25

2008-03-25

Ahn, Sam K. (Department: 2611)

Pulse or digital communications

Transmitters

Antinoise or distortion

Reexamination Certificate

active

07349490

ABSTRACT:
A digital predistortion system and method employing parallel signal paths is disclosed. A first primary signal path receives a rectangular (I,Q) input signal and provides it to an additive predistortion correction circuit. A second parallel signal path includes coordinate rotation circuitry and a predistortion coefficient look up table. Any effects of calculational errors on the primary input signal are minimized by avoiding manipulations of the input signal in the primary signal path. A third parallel signal path may be used to receive the input signal for calculating adaptive updates to the look up table entries.

REFERENCES:
patent: 4700151 (1987-10-01), Nagata
patent: 5404378 (1995-04-01), Kimura
patent: 5524286 (1996-06-01), Chiesa et al.
patent: 5870668 (1999-02-01), Takano et al.
patent: 7139327 (2006-11-01), Vella-Coleiro et al.
patent: 2003/0179830 (2003-09-01), Eidson et al.
patent: 2239770 (1991-07-01), None

Affiliated with

Also associated with

Rating

Additive digital predistortion system employing parallel... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Additive digital predistortion system employing parallel..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Additive digital predistortion system employing parallel... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2806863