Addition control system

Details Addition control system Addition control system

1975-09-02

1976-08-24

Dildine, Jr., R. Stephen

Registers

Transfer mechanism

Traveling pawl

235175, G06F 7385

Patent

active

039768660

ABSTRACT:
A system for controlling the addition of signed binary numbers represented with N bits, of the 2's complement notation, is disclosed which includes addend and augend sign control circuits, and an adder circuit comprising a carry save adder and a carry proper gate adder. The addend sign control circuit receives an operation command sign signal (B, --B, .vertline.B.vertline. or --.vertline.B.vertline.) for the addend, which designates the addend of the certain type (B, .vertline.B.vertline. or --.vertline.--B.vertline.) to be applied directly to the carry save adder and designates the addend of another type (--B, .vertline.--B.vertline. or --.vertline.B.vertline.) to be applied to the carry save adder through a 1's complementer. The augend sign control circuit functions similarly for the augend being applied to the carry save adder. A corrective number (0, 1 or 2) is applied to the adder circuit which corresponds to neither, one, or both the addend and augend being applied to the adder circuit through their respective 1's complementer.

REFERENCES:
(S2765-0143) Anderson, R. B. 64-Bit Adder, In IBM Tech. Disc. Bull. 14(10): pp. 2939-2941, Mar. 1972.

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