Addition apparatus having round-off function

Details Addition apparatus having round-off function Addition apparatus having round-off function

1991-03-22

1993-04-20

Nguyen, Long T.

Boots, shoes, and leggings

364745, 364754, G06F 750, G06F 738, G06F 752

Patent

active

052048322

ABSTRACT:
An addition apparatus adds together two numbers while detecting one of a plurality (n) of possible round-off positions and executing round-off at that position simultaneously with adding together the numbers. The apparatus is divided into a plurality of circuit sections. In a first section, two lowest-significance portions of the two numbers are added together in each of n parallel adder circuits while executing round-off processing at respectively different bit positions in each of the adder circuits. In each of subsequent sections, portions of increasing significance of the two input numbers are added together in a first parallel adder to which a "1" state input carry is applied and a second parallel adder in which a "0" state carry is supplied, and in each section, n section carry signals are--generated in accordance with carry outputs produced from the adders of that section and respective section carry signals produced from the preceding section. A control signal for selecting the output sum from one of the parallel adders of the lowest-significance section and thereby determining the round-off position is generated based on a combination of carry signals supplied to the highest-significance circuit section and MSB signals produced from the two parallel adders of that section.

REFERENCES:
patent: 4682303 (1987-07-01), Uya
patent: 4839846 (1989-06-01), Hirose et al.
patent: 5018093 (1991-05-01), Shih

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