Adder with improved carry lookahead structure

Boots – shoes – and leggings

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

G06F 750

Patent

active

056361564

ABSTRACT:
An adder circuit is disclosed having an improved carry lookahead arrangement. The number of carry lookahead stages required is log n, where n is equal to the number of bits in the adder. This arrangement has fanout limit based on the number of sets of propagate and generate signals which can be combined at each bit location of each stage. For example, if two-way merge circuits are used to combine two sets of signals together, then the maximum fanout from the previous stage would be limited to two (2). If four-way merge circuits were used, then the fanout would be limited to four (4). This low fanout is achieved without increasing the number of stages by overlapping the groups that are combined in each step.

REFERENCES:
patent: 4099248 (1978-07-01), Borgerson et al.
patent: 4677584 (1987-06-01), Steck
patent: 4764888 (1988-08-01), Holden et al.
patent: 4858168 (1989-08-01), Hwang
patent: 4924423 (1990-05-01), Vassiliadis et al.
patent: 4962471 (1990-10-01), Cornelissen
patent: 5136539 (1992-08-01), Kumar
patent: 5257218 (1993-10-01), Poon
patent: 5278783 (1994-01-01), Edmondson
Richard P. Brent, et al. "A Regular Layout for Parallel Address", IEEE, 1982 pp. 260-264.
Robert K. Montoye, "Area-Time Efficient Addition in Charge Based Technology", 19th Design Automation Conference, Jun. 1981, pp. 862-872.
Tackdon Han, et al., "Fast Area-Efficient VLSI Adders", Proceedings Computer Arithmetic, The Computer Society of the IEEE, May 1987, Como, Italy, pp. 49-55.
Binay Sugla, et al., "Extreme Area-Time Tradeoffs in VLSI", IEEE Transactions on Computers, vol. 39, No. 2, Feb. 1990, pp. 251-257.
Kazumasa Suzuki, et al., "A 500 MHz, 32 bit, 0.4 .theta.m CMOS RISC Processor", IEEE Journal of Solid State Circuits, vol. 29, No. 12, Dec. 1994, pp. 1464-1473.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Adder with improved carry lookahead structure does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Adder with improved carry lookahead structure, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Adder with improved carry lookahead structure will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-396662

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.