Adder with carry enable for bit operations in an electric digita

Registers – Transfer mechanism – Traveling pawl

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235175, 3401725, G06F 750, G06F 1502

Patent

active

039566200

ABSTRACT:
A greatly simplified calculator circuit implemented, for example, utilizing I.sup.2 L technology is fabricated on a relatively small semiconductor chip resulting in high yield. A unique feature of such calculator is a dual adder which selectively functions as a multibit word adder and also as a plurality of single bit adders. This dual functioning adder cooperates with the calculator system in such a manner as to reduce the total amount of circuitry required to implement the calculator function thereby permitting fabrication on the smaller chip. The dual adder is utilized, for example, to perform bit operations for use in flagging and 2's complement addition for subtraction operations as well as normal multibit word addition.

REFERENCES:
patent: 3296426 (1967-01-01), Ball
patent: 3317721 (1967-05-01), Berlind
patent: 3388239 (1968-06-01), Duncan et al.
patent: 3400259 (1968-09-01), Maczko et al.
patent: 3463910 (1969-08-01), Keslin
patent: 3596074 (1971-07-01), Mitrofanoff

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