Adder-subtracter circuit

Details Adder-subtracter circuit Adder-subtracter circuit

2007-12-25

2007-12-25

Mai, Tan V. (Department: 2193)

Electrical computers: arithmetic processing and calculating

Electrical digital calculating computer

Particular function performed

Reexamination Certificate

active

10793036

ABSTRACT:
An adder-subtracter circuit being adapted to process two binary input numbers in order to generate the sum or the difference of the two processed numbers depending on the state of a subtract input signal. The circuit has the capability to feed back the result of the processing to itself in order to process one input number together with the result of a previous processing instead of the second binary number.

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Simon Knowles, “A Family of Adders”, IEEE, pp. 30-37, 1999.

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