Adder circuit with an encoded carry

Details Adder circuit with an encoded carry Adder circuit with an encoded carry

1990-12-04

1991-09-24

Harkcom, Gary V.

Boots, shoes, and leggings

364784, G06F 750

Patent

active

050519433

ABSTRACT:
An adder circuit that has an encoded carry input, where a bit position weight of the carry input is two, allows the adder circuit to selectively concurrently add a data value of two to a first and a second input data operand of the adder circuit. The adder circuit is also able to add the first and second input data operands with a second carry input that is not encoded. A recoded multiplier combines two partial product calculations into one calculation during only a first partial product calculation operation by using the adder circuit. Partial product calculations are reduced in number during a multiply operation of a data processor.

REFERENCES:
patent: 4897808 (1990-01-01), Nakagawa et al.

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