Adder circuit apparatus

Details Adder circuit apparatus Adder circuit apparatus

1990-05-31

1992-08-18

Malzahn, David H.

Boots, shoes, and leggings

G06F 250

Patent

active

051405466

ABSTRACT:
An adder circuit includes a Manchester-carry-chain circuit which propagates a carry signal for each block consisting of plural bits, and a carry-look-ahead circuit which selects said carry signal in response to a carry propagation signal being generated by a full adder, and when the carry signal is not generated in the two consecutive blocks, an output from the Manchester-carry-chain circuit is selected by the carry-look-ahead circuit, so that the carry signal being inputted to the low-order block of the two blocks can be propagated as the carry signal to be outputted from the high-order block.

REFERENCES:
patent: 4817031 (1989-03-01), Tokumaru
patent: 4827444 (1989-05-01), Akiyama et al.
patent: 4899305 (1990-02-01), Needles
patent: 4905180 (1990-02-01), Kumar
Principles of CMOS VLSI Design; Weste, et al., pp. 324-325, Addison-Wesley, 1985.

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