ADC linearity improvement

Details ADC linearity improvement ADC linearity improvement

2005-01-25

2005-01-25

Young, Brian (Department: 2819)

Coded data generation or conversion

Analog to or from digital conversion

Analog to digital conversion

C341S120000, C341S159000

Reexamination Certificate

active

06847320

ABSTRACT:
A method and circuit for improving linearity of a folding or flash analog-digital-converter (ADC) circuit. Averaging resistors connect outputs of each of a bank of first pre-amplifiers. A series adjustment resistor is placed between each node connecting the output of a first bank pre-amplifier and the associated averaging resistor, and the input of each of a second bank pre-amplifier. An adjustment current is injected through the adjustment resistor during a calibration. A permanent value for adjustment current is determined such that an effect of offset errors is substantially minimized.

REFERENCES:
patent: 6072416 (2000-06-01), Shima
patent: 6100836 (2000-08-01), Bult
patent: 6369732 (2002-04-01), Liu et al.
Taft, Robert et al. Feb. 17, 2004. “High-Speed A/D Converters.”IEEE International Solid-State Circuits Conference:Session 14:pp252-253.

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