Pulse or digital communications – Receivers
Reexamination Certificate
2010-11-12
2011-10-04
Fan, Chieh M (Department: 2611)
Pulse or digital communications
Receivers
C375S324000, C375S340000, C375S349000, C375S350000, C375S351000, C375S354000, C375S377000, C341S126000, C341S141000, C341S155000, C708S313000
Reexamination Certificate
active
08031810
ABSTRACT:
An architecture for use in wireless receiver applications, particularly for ADC conversion of received in-phase I and quadrature Q signals. A single ADC is shared to convert both signals, and the ADC input is alternately switched between the i and q signals. In an embodiment, the ADC is clocked at an increased sample rate, and the digital output signals are aligned to compensate for the phase difference resulting from the implementation of the single ADC.
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Hsu Yungping
Yu Mao
Fan Chieh M
Marvell International Ltd.
Vlahos Sophia
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