Adaptive stream buffers

Details Adaptive stream buffers Adaptive stream buffers

1997-05-28

1999-09-28

Treat, William M.

Electrical computers and digital processing systems: processing

Instruction fetching

Prefetching

711122, 711133, 711137, 711159, 711213, 711218, G06F 1200

Patent

active

059580402

ABSTRACT:
The invention is a system providing adaptive stream buffers using instruction-specific prefetching avoidance (ISPA). According to the invention, each time the CPU executes an instruction resulting in prefetched cache lines not being used, the instruction address is stored in a table. Subsequent instruction addresses are compared to the instruction addresses in the table, and a stream buffer is not allocated when the subsequent instruction address is found within the table.

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Palacharla et al., "Evaluating Stream Buffers as a Secondary Cache Replacement", Proceedings of 21st Annual International Symposium on Computer Architecture, ACM, p. 24-33, Apr. 18-28, 1994.

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