Adaptive predistortion circuit with memory

Details Adaptive predistortion circuit with memory Adaptive predistortion circuit with memory

1990-03-14

1992-09-15

Safourek, Benedict V.

Pulse or digital communications

Repeaters

Testing

455126, 328162, 332107, 332159, 332103, 375 39, H04L 2549

Patent

active

051484480

ABSTRACT:
An adaptive predistortion circuit with memory for a digital transmission system includes a set (10) of input registers storing various consecutive data symbols a predistortion circuit (11) for predistorting the data of the consecutive data symbols before they pass through a modulator (14) and then through an amplifier (15) and an adaptation circuit (19) which, in response to a demodulation (16, 17.sub.1, 17.sub.2, 18.sub.1, 18.sub.2) of the stream of transmitted data symbols continuously adapts the predistortion circuit (11) to the stream of input data symbols. The adaptation circuit (19) includes a set (21) of counters/accumulators which determine the center of gravity of the smeared spots (clouds) created by the distortion by calculating a set of errors that is used for adapting the predistortion circuit (11). Preferably, the predistortion circuit is a random access memory. In order to reduce the size of this random access memory the symmetry of the constellation is used and therefore at data input the constellation is reduced to a quarter of the constellation. Reverse operations are thus necessary at the output and in the adaptation loop.

REFERENCES:
patent: 4291277 (1981-09-01), Davis et al.
patent: 4308618 (1981-12-01), Levy et al.
patent: 4329655 (1982-03-01), Nojima et al.
patent: 4633484 (1986-12-01), Takeda et al.
patent: 4696055 (1987-09-01), Marshall
patent: 4700151 (1987-10-01), Nagata
patent: 4967164 (1990-10-01), Sari
A. A. M. Saleh et al., "Adaptive Linearization of Power Amplifiers in Digital Radio Systems", Bell System Technical Journal, Apr. 1983, vol. 62, No. 4, Part 1, pp. 1019-1033.

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