Adaptive predistortion circuit

Details Adaptive predistortion circuit Adaptive predistortion circuit

1989-09-14

1990-10-30

Mottola, Steven

Amplifiers

Hum or noise or distortion bucking introduced into signal...

330151, H03F 126

Patent

active

049671642

ABSTRACT:
An adaptive predistortion circuit for a digital transmission system which comprises a predistortion circuit (52.sub.1, 52.sub.2) predistorting the input data prior to their entering a modulator (56) and thereafter an amplifier (57), and an adaptation circuit (61.sub.1, 61.sub.2) continuously adapting the predistortion circuit to the stream of transmitted data in response to a demodulation of the stream of transmitted data. The predistortion circuit further comprises an encoder (51) which, on the basis of digital data a.sub.k, generates on a first path digital data b.sub.k which leave a first predistortion circuit (52.sub.1) in a predistorted manner and in-phase with the symbol clock, and on a second path digital data c.sub.k which leave a second predistortion circuit (52.sub.2) in a predistorted manner and in phase-opposition to the symbol clock. The signals b.sub.k and c.sub.k are obtained by means of a polynomial encoding. The encoding may be effected with the aid of shift registers (62.sub.1 . . . 62.sub.I) addressing a memory.

REFERENCES:
patent: 4291277 (1981-09-01), Davis et al.
patent: 4879519 (1989-11-01), Myer

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