Adaptive polling system by generating sequence of polling signal

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364130, 364148, 364166, 364514B, 39518219, 395550, 395835, 395839, G06F 1134, G06F 1300

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active

055663516

ABSTRACT:
System timers set by a central processing unit (CPU) provide a variable wait time functionally adapted and related to peripheral device availability. Wait time is iteratively and dynamically adjusted to more closely match peripheral performance to the system, thereby reducing CPU load and enhancing data throughput, with the data output routine executing at a process level rather than an interrupt level.
In a preferred embodiment, the prior wait time is cumulated during which the peripheral is unavailable for data in order to form a running average delay utilized as a starting point for a next data input. Large delays are weighted to avoid skewing average wait time too quickly for infrequent longer events. Data throughput is thereby increased, avoiding unnecessary dormant periods with no output from the system, while, at the same time, CPU loading is reduced by avoiding excessive system polling.

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