Adaptive play-out buffers and clock operation in packet...

Details Adaptive play-out buffers and clock operation in packet... Adaptive play-out buffers and clock operation in packet...

2006-06-12

2009-12-22

Chang, Joseph (Department: 2817)

Oscillators

With frequency adjusting means

With voltage sensitive capacitor

C331S00100A

Reexamination Certificate

active

07636022

ABSTRACT:
Methods and apparatus are described for a play-out buffer. A method includes writing a data packet into a jitter buffer at a write address specified by a write address generator; incrementing the write address generator; generating the difference between the write address and a current read address specified by a read address generator; reading a data packet from the jitter buffer from the current read address specified by the read address generator; generating a new read address based on the difference between the write address and the current read address by the read address generator. An apparatus includes a jitter buffer; a write address generator for storing a write address; a read address generator for storing a current read address; a read address increment control; wherein the read address increment control sets the future read address based on the difference between the write address and the current read address. Another method of driving a numerically controlled oscillator includes providing a local clock with a clock cycle; generating a numerical value during each clock cycle; adding the numerical value to an accumulator having a most significant bit; and using the value of the most significant bit as an oscillator. Another apparatus includes a local clock with a clock cycle; a jitter buffer having a write address and a current read address; a first accumulator; a second accumulator having a most significant bit; an increment control; wherein the increment control sets an accumulation value to be added to the first accumulator based on the difference between the write address and the current read address; wherein the value of the second accumulator depends on the first accumulator; and wherein the most significant bit functions as an oscillator.

REFERENCES:
patent: 4636734 (1987-01-01), Genrich
patent: 5786778 (1998-07-01), Adams et al.
patent: 2003/0053493 (2003-03-01), Graham Mobley et al.

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