Adaptive phase locked loop system with charge pump having dual c

Oscillators – Automatic frequency stabilization using a phase or frequency... – Particular error voltage control

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331 16, 331 25, 331 66, 327105, 327157, H03L 102, H03L 7089, H03L 7093, H03L 718

Patent

active

057740232

ABSTRACT:
A phase locked loop (PLL) system receiving a reference frequency and generating an output frequency has a charge pump (28), loop filter (38), an N frequency divider (32), an R frequency divider (24), a Voltage Controlled Oscillator (30) and a phase detector (26). The charge pump (28) has a high current output (62) and a low current output (60). The loop filter (38) responsively coupled to the charge pump (28) has a first pole filter that includes a high current first pole filter capacitor (66), a high current first pole damping resistor (70), a low current first pole filter capacitor (64), a low current first pole damping resistor (68), and a first pole filter capacitor (72). A second pole filter can be added that includes a second pole filter capacitor (76), a second pole damping resistor (74), and a feed forward capacitor (78).

REFERENCES:
patent: 5675291 (1997-10-01), Sudjian

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