Adaptive phase lock loop

Details Adaptive phase lock loop Adaptive phase lock loop

1990-12-21

1992-03-03

Chin, Stephen

Pulse or digital communications

Repeaters

Testing

375118, 328155, H04L 2706

Patent

active

050938479

ABSTRACT:
An adaptive phase lock loop for jitter tracking. A filter in the adaptive PLL has coefficients that are automatically adjusted to minimize the error signal. The first block of the adaptive PLL is a phase shifter that is used to eliminate the frequency offset and phase offset in the input signal. The output of the phase shifter is received by a slicer that makes an estimate of what the corrected signal should be. Then the difference between the input and output of the slicer is multiplied by the output of the slicer. The imaginary part of the result is used as an estimate of the phase error. After passing through an amplitude limiter the signal is provided to a finite impulse response (FIR) filter having adaptive coefficients. The FIR coefficients are adjusted to minimize the mean squared phase error using a gradient method. These coefficients are updated each baud. A second order loop is added to track any frequency offset present in the line signal. The signal is fed through a sin/cos table back to the phase shifter.

REFERENCES:
patent: 4514855 (1985-04-01), Lang et al.
patent: 4777640 (1988-10-01), Turner et al.
patent: 4953182 (1990-08-01), Chung
patent: 4958360 (1990-09-01), Sari

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