Adaptive peaking circuit

Details Adaptive peaking circuit Adaptive peaking circuit

1990-07-09

1992-06-23

Shepperd, John W.

Facsimile and static presentation processing

Facsimile

Specific signal processing circuitry

H04N 508

Patent

active

051247941

ABSTRACT:
A video system includes a scan converter for developing a progressively scanned display of video lines from a two field interlaced line system. A spatial array of six pixels covering two successive video lines is developed and gradients are determined between diagonally opposed pairs of pixels and a vertically opposed pair of pixels in the array. The interpolated pixel is developed by averaging the two pixels in the smallest of the gradients. A non-orthogonal display is developed by using horizontally interpolated pixels in the array developed by averaging successive pairs of real pixels, which introduces an offset of one-half pixel duration to the interpolated pixels. An adaptive peaking and noise coring circuit is included. Another spatial array of three line of pixels, both real and interpolated, is developed and a horizontal, a vertical and two diagonal gradients between pairs of pixels in the array are calculated. Logic circuitry and a maximum value decoder determine a peaking factor based upon the maximum gradient. A simplified adjustable noise coring circuit with symmetrical and asymmetrical peaking is also disclosed.

REFERENCES:
patent: 4677461 (1987-06-01), Mizutani et al.
patent: 4819062 (1989-04-01), Dongil et al.
patent: 4985764 (1991-01-01), Sato

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