Amplifiers – With amplifier bypass means
Reexamination Certificate
1998-03-13
2001-01-09
Shingleton, Michael B (Department: 2817)
Amplifiers
With amplifier bypass means
C330S149000
Reexamination Certificate
active
06172565
ABSTRACT:
FIELD OF THE INVENTION
This invention relates to a wideband power amplifier and specifically to an amplifier having a feed-forward linearizer arrangement employing digital signal processing techniques for performing joint linearization, equalization and delay alignment.
BACKGROUND OF THE INVENTION
In many radio frequency, RF, applications power amplifiers are employed to amplify high frequency signals. Because the RF amplifiers are biased to provide substantially high output power, they exhibit nonlinear responses to some degree. Consequently, in response to an increase in the output signal power, such RF amplifiers generate intermodulation IM components, which may have frequencies that are outside a desired frequency band.
One solution to eliminate the consequences of the nonlinear response of the amplifier is to employ multiple amplifiers each configured to amplify a predetermined carrier signal. For example, in a mobile communications environment, the base station sends multiple carrier signals in accordance with time division multiple access (TDMA) scheme, or in accordance with code division multiple access (CDMA) scheme. Each carrier frequency in TDMA scheme corresponds to one of the users in a specifiable cell. Furthermore, each pseudocode in CDMA scheme corresponds to one of the users in a specifiable cell. Because the base station has to communicate with many users in the corresponding cell, the intermodulation IM components increase with the number of the users. Thus, the use of a separate amplifier for each carrier signal substantially eliminates the generation of intermodulation IM components. However, this approach is costly and may not be commercially feasible in many applications.
Another approach is to employ an analog linearizer, such as
10
as illustrated in FIG.
1
. For purposes of illustrating the operation of linearizer
10
, it is assumed that a two-tone signal is provided to the linearizer. Basically, a radio frequency signal represented by frequency components
22
is fed to a power amplifier
12
. Amplifier
12
generates additional intermodulation IM frequency components
24
because of its nonlinear response characteristics. Signal components
22
′ correspond to an amplified version of signal components
22
. The function of linearizer
10
is to substantially eliminate frequency components
24
, as explained in more detail below.
Linearizer
10
includes a signal cancellation circuit
26
coupled to an error cancellation circuit
28
. Signal cancellation circuit
26
has an upper branch that includes power amplifier
12
, and a lower branch that provides the input signal of the linearizer to an input port of an adder
16
via a delay element
15
. The other input port of adder
16
is configured to receive the output signal generated by power amplifier
12
, via an attenuator
14
. As a result, the output port of adder
16
provides signal components
24
′, which correspond to the attenuated version of intermodulation IM frequency components
24
. The purpose of delay element
15
is to assure that the input signal provided to adder
16
through the lower branch is aligned with the input signal provided through the upper branch.
Error cancellation circuit
28
also includes an upper branch that is configured to provide the output signal generated by amplifier
12
to an adder
20
via a delay element
17
. The lower branch of error cancellation circuit
28
includes an amplifier
18
, which is configured to receive the attenuated intermodulation components
24
′. Amplifier
18
generates an amplified version of signal
24
′ which is substantially equal to intermodulation component
24
. As a result, the output port of adder
20
provides signal components
22
′ without the distortion caused by amplifier. The purpose of delay element
17
is to assure that the signal provided through the lower branch is aligned with the direct signal provided in the upper branch.
The feedforward linearizer described in
FIG. 1
has some disadvantages. For example, it is not able to adapt to signal changes. Furthermore, for wide-band input signals in the microwave frequency range, adjusting the delay in delay elements
15
and
17
is difficult. A small delay misalignment may lead to serious signal distortion. In order to provide a delay alignment between the upper and lower branches of the two cancellation circuits, some linearizers have been suggested that attempt to align the signal by trial and error during the operation. These linearizers employ a delay adjuster to achieve the intended delay alignment. However, the trial and error approach provides only limited accuracy and may lead to unacceptable output signal response.
For signals or the microwave frequency range, the bandwidth accommodated by power amplifier
12
is relatively small. Amplifiers that accommodate a large bandwidth are expensive. Thus, equalization for the power amplifier is required to increase the operating bandwidth so that the frequency response of the power amplifier is substantially flat. The prior art feedforward linearizers direct all the linear distortion caused by delay misalignment and the non-linear distortions caused by of the power amplifier to the auxiliary amplifier in the error cancellation loop. The auxiliary amplifier is designed as a class A amplifier. The distortion generated by the auxiliary amplifier itself is not recoverable. Thus, a high-accuracy class A amplifier that handles high power input is required in the error cancellation loop, which is expensive and difficult to design.
Thus, there is a need for a feedforward linearizer that employs an effective digital signal processing technique that provides delay alignment and equalization to suppress intermodulation components, by an arrangement that is both effective and economical.
SUMMARY OF THE INVENTION
In accordance with one embodiment of the invention, a feedforward linearizer includes a signal cancellation circuit and an error cancellation circuit. The signal cancellation circuit includes a tap delay line, that delay the input signal by a predetermined time delay so as to provide several delayed versions of the input signal. Each delayed version of the input signal is weighted by a tap coefficient. The weighted signals are then added together and fed to the power amplifier. The tap coefficients are derived such that the signals traveling through the upper and lower branch of the signal cancellation loop are aligned and that the output signal of the power amplifier is equalized.
The error cancellation circuit also includes a tap delay line, that delays the error signal to the error cancellation circuit by a predetermined time delay so as to provide several delayed versions of the error cancellation input signal. Each delayed version of the error cancellation input signal is weighted by a tap coefficient. The weighted signals are then added together and fed to an auxiliary amplifier. The tap coefficients in the error cancellation circuit are derived such that the signals traveling through the upper and lower branch of the error cancellation circuit are aligned.
In accordance with one embodiment of the invention, the tap coefficients are derived such that substantially no equalization for the auxiliary amplifier is achieved.
REFERENCES:
patent: 5049832 (1991-09-01), Cavers
patent: 5157345 (1992-10-01), Kenington et al.
patent: 5489875 (1996-02-01), Cavers
patent: 5515000 (1996-05-01), Maruyama et al.
patent: 675594A1 (1995-01-01), None
patent: 729228A1 (1996-08-01), None
Cavers, J.K. “Adaption behavior of a feedforward amplifier linearizer,”IEEE Trans. on Veh. Tech.,Feb. 1995, vol. 44, No. 1, pp. 31-40.
Grant, S.J., et al., “A DSP controlled adaptive feedforward amplifier linearizer,”5th International Conference on Universal Personal Communications,Cambridge. MA, 1996, vol. 2, pp. 788-792.
European Search Report for Application No. 99301791 dated Jun. 30, 1999.
Chen Jiunn-Tsair
Chen Young-Kai
Tsai Huan-Shang
Lucent Technologies - Inc.
Shingleton Michael B
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