Electrical computers and digital processing systems: multicomput – Distributed data processing
Reexamination Certificate
2011-08-30
2011-08-30
Chea, Philip J (Department: 2492)
Electrical computers and digital processing systems: multicomput
Distributed data processing
C709S205000, C709S222000, C712S015000, C712S029000
Reexamination Certificate
active
08010593
ABSTRACT:
The present invention provides an adaptive integrated circuit. The various embodiments include a plurality of heterogeneous computational elements coupled to an interconnection network. The plurality of heterogeneous computational elements include corresponding computational elements having fixed and differing architectures, such as fixed architectures for different functions such as memory, addition, multiplication, complex multiplication, subtraction, configuration, reconfiguration, control, input, output, and field programmability. In response to configuration information, the interconnection network is operative in real time to configure and reconfigure the plurality of heterogeneous computational elements for a plurality of different functional modes, including linear algorithmic operations, non-linear algorithmic operations, finite state machine operations, memory operations, and bit-level manipulations.
REFERENCES:
patent: 5737631 (1998-04-01), Trimberger
patent: 5910733 (1999-06-01), Bertolet et al.
patent: 5963048 (1999-10-01), Harrison et al.
patent: 6076174 (2000-06-01), Freund
patent: 6094065 (2000-07-01), Tavana et al.
patent: 6353841 (2002-03-01), Marshall et al.
patent: 6988139 (2006-01-01), Jervis et al.
patent: 2002/0194248 (2002-12-01), Wood et al.
patent: 2003/0041095 (2003-02-01), Konda et al.
patent: 2003/0135621 (2003-07-01), Romagnoli
patent: 2004/0049672 (2004-03-01), Nollet et al.
patent: 2005/0204040 (2005-09-01), Ferri et al.
patent: A-07-066718 (1995-03-01), None
patent: A-10-233676 (1998-09-01), None
patent: A-11-296345 (1999-10-01), None
patent: A-2000-315731 (2000-11-01), None
U.S. Appl. No. 11/962,979 Office Action Date Mailed Sep. 22, 2009.
U.S. Appl. No. 11/241,009 Office Action Date Mailed Feb. 7, 2007.
U.S. Appl. No. 09/997,987 Office Action Date Mailed Oct. 19, 2004.
U.S. Appl. No. 09/997,530 Office Action Date Mailed Oct. 12, 2007.
U.S. Appl. No. 09/997,530 Office Action Date Mailed Sep. 6, 2005.
U.S. Appl. No. 09/997,530 Office Action Date Mailed Mar. 7, 2007.
U.S. Appl. No. 09/997,530 Office Action Date Mailed Sep. 25, 2009.
U.S. Appl. No. 09/997,530 Office Action Date Mailed Jun. 5, 2006.
U.S. Appl. No. 09/997,530 Office Action Date Mailed Apr. 10, 2008.
U.S. Appl. No. 10/990,800 Office Action Date Mailed Feb. 22, 2010.
U.S. Appl. No. 10/990,800 Office Action Date Mailed Feb. 25, 2009.
U.S. Appl. No. 10/990,800 Office Action Date Mailed Sep. 13, 2007.
U.S. Appl. No. 10/990,800 Office Action Date Mailed Jun. 6, 2008.
U.S. Appl. No. 10/990,800 Office Action Date Mailed Oct. 15, 2009.
U.S. Appl. No. 09/815,122 Office Action Date Mailed Dec. 29, 2003.
U.S. Appl. No. 10/384,486 Office Action Date Mailed Apr. 13, 2007.
U.S. Appl. No. 10/384,486 Office Action Date Mailed Sep. 6, 2005.
U.S. Appl. No. 10/384,486 Office Action Date Mailed Aug. 3, 2007.
U.S. Appl. No. 10/384,486 Office Action Date Mailed Aug. 31, 2006.
Hogenauer Eugene
Master Paul L.
Scheuermann Walter James
Chea Philip J
Nixon & Peabody LLP
QST Holdings LLC
LandOfFree
Adaptive integrated circuitry with heterogeneous and... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Adaptive integrated circuitry with heterogeneous and..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Adaptive integrated circuitry with heterogeneous and... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2724167