Adaptive instruction sequence synthesizer and process

Details Adaptive instruction sequence synthesizer and process Adaptive instruction sequence synthesizer and process

1985-01-09

1987-10-20

Eng, David Y.

Boots, shoes, and leggings

G06F 900

Patent

active

047018470

ABSTRACT:
An apparatus and method for adaptively generating instructions for use by the central processing unit (CPU) of a computer. Upon detection of a start up signal pattern on the computer's system bus, instructions are generated in response to memory access signals from the CPU. The invention performs data processing operations that would otherwise be performed by the CPU, and produces instructions for execution by the CPU based on the results of these data processing operations, thereby reducing the number of instructions executed by the CPU to perform a predefined task.

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Nichols, "Discrete I/O for uCOM-8", 1975, NEC Microcomputers, Inc.
Nichols, "Hardware Versus Software for Microprocessor I/O", Computer Design, Aug. 1976.
Don Lancaster, "Build the TVT-6: A Low-Cost Direct Video Display", Popular Electronics.

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