Adaptive input logic for phase adjustments

Details Adaptive input logic for phase adjustments Adaptive input logic for phase adjustments

2006-04-25

2006-04-25

Lam, Tuan T. (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Phase shift by less than period of input

C327S258000, C327S259000

Reexamination Certificate

active

07034596

ABSTRACT:
Systems and methods are disclosed to provide static and/or dynamic phase adjustments to a data signal relative to a clock signal. For example, the data signal may be delayed by a coarse delay and/or a fine delay to match the timing of the clock signal independently for each input path (e.g., per input pad). The delay may be as a function of positive and/or negative clock edges.

REFERENCES:
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patent: 5515403 (1996-05-01), Sloan et al.
patent: 5778214 (1998-07-01), Taya et al.
patent: 6407583 (2002-06-01), Saito
patent: 6491634 (2002-12-01), Leavitt et al.
patent: 6628154 (2003-09-01), Fiscus
patent: 6765973 (2004-07-01), Miller et al.

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