Adaptive filtering scheme for sampling phase relations of clock

Details Adaptive filtering scheme for sampling phase relations of clock Adaptive filtering scheme for sampling phase relations of clock

1997-10-07

1999-11-23

Le, Dinh T.

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Phase shift by less than period of input

327141, 327236, 327 2, H03K 513, H03K 500

Patent

active

059907193

ABSTRACT:
An apparatus for adjusting phase relation of a plurality of clock signals in a processor. The apparatus contains a phase detection circuit that receives a plurality of clock signals and generates a first output based on a phase relation between those clock signals. A controller then adjusts the delay of the clock signals based on the first output of the phase detection circuit and a bit of a delay shift register to synchronize the clock signals within a predefined range. The controller generates a second output if the phase relation between the plurality of clock signals has changed before the adjusting of the delay of the clock signals has occurred. A noise band circuit is configured to receive the second output of the controller and adjust the predefined range in response to the receiving of the second output.

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patent: 5631591 (1997-05-01), Bar-Niv et al.
patent: 5675273 (1997-10-01), Masleid
patent: 5819076 (1998-10-01), Jeddeloh et al.

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