Oscillators – Automatic frequency stabilization using a phase or frequency... – Afc with logic elements
Reexamination Certificate
2001-10-09
2003-02-18
Pascal, Robert (Department: 2817)
Oscillators
Automatic frequency stabilization using a phase or frequency...
Afc with logic elements
C331S014000, C331S018000, C331SDIG002
Reexamination Certificate
active
06522206
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to feedback control systems.
2. Description of the Related Art
A phase-locked loop is a particular type of feedback control system that maintains a feedback signal in a specific phase relationship with a reference signal. Phase-locked loops are vital parts of a wide variety of electronic systems (e.g., frequency synthesizers, analog and digital modulators, clock recovery circuits and direct digital synthesizers) and the basic structure of conventional phase-locked loops has been described (e.g., see U.S. Pat. Nos. 6,222,421 and 6,252,466 respectively issued Apr. 24, 2001 and Jun. 26, 2001).
Conflicting demands, however, are placed on the selection of loop bandwidth for conventional phase-locked loops. The loop bandwidth is preferably set low to filter out spurious tones and reduce phase noise to thereby improve system spectral and noise performances. The loop bandwidth, however, is preferably set high to achieve rapid switching time in response to a frequency change of the reference signal. Accordingly, the selection of loop bandwidth has typically been a compromise which degrades one or more phase-locked loop performance parameters.
SUMMARY OF THE INVENTION
The present invention is directed to feedback methods and systems that achieve rapid switching of oscillator frequencies without compromising operational feedback loop bandwidths that filter out spurious tones and phase noise to thereby enhance loop spectral and noise performance.
These goals are realized with feedback methods that respond to frequency changes in a reference signal by:
a) providing an open-loop drive current to drive a feedback signal towards the reference signal,
b) over a comparison window of time, successively comparing a feedback frequency of the feedback signal to a destination frequency of the reference signal to effect a determination that the feedback frequency has entered a predetermined acquisition range of the destination frequency; and
c) terminating the drive current and closing the feedback control loop to lock the feedback signal to the reference signal.
In an embodiment of the invention, the determination is effected when at least one count of rising and falling edges of the feedback signal obtains a predetermined relationship with at least one count of rising and falling edges of the reference signal.
The invention also provides a feedback control systems that practice the invention's methods.
The novel features of the invention are set forth with particularity in the appended claims. The invention will be best understood from the following description when read in conjunction with the accompanying drawings.
REFERENCES:
patent: 5838202 (1998-11-01), Kosiec et al.
patent: 5920233 (1999-07-01), Denny
patent: 6222421 (2001-04-01), Kiyose
patent: 6252466 (2001-06-01), Kawamura
patent: 6329882 (2001-12-01), Fayneh et al.
Byrd, David, et al., Application Note 1000, National Semiconductor Corporation, Jul., 1995, pp. 1-5.
LM2306/LMX2316/LMX2326 Low Power Frequency Synthesizer Data Sheet, National Semiconductor Corporation, Apr., 2001, pp. 1-18.
Crook David T.
Kornblum John J.
Analog Devices Inc.
Koppel, Jacobs Patrick & Heybl
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