Adaptive equalizer capable of effectively removing a remaining f

Pulse or digital communications – Repeaters – Testing

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3647242, H03H 730, G06F 1531

Patent

active

052300064

ABSTRACT:
In an adaptive equalizer (40) connected to a demodulator (14) to equalize a demodulated signal into an equalized signal in accordance with main and first through N-th controllable tap gains, where N represents a positive integer which is not less than one, the main and the first through the N-th controllable tap gains are produced dependent upon the demodulated and the equalized signals and are controlled by main and first through N-th parameters, respectively. A supplying circuit (42) supplies main and first through N-th values as the main and the first through the N-th parameters to the adaptive equalizer when the demodulator is put in a synchronization state. The supplying circuit supplies main and first through N-th additional values as the main and the first through the N-th parameters to the adaptive equalizer when the demodulator is put out of the synchronization state.

REFERENCES:
patent: 4404681 (1983-09-01), Hullwegen
patent: 4433425 (1984-02-01), De Jaeger
patent: 4597089 (1989-06-01), Motley et al.
patent: 4672631 (1987-06-01), Suzuki et al.
patent: 4805191 (1989-02-01), Burch et al.
H. Yamamoto et al, "Automatic Equalizer in 1.544 Mb/s PCM-FDM System", Elec. Comm. Labs Tech. Journal, vol. 23, No. 6 (1974), pp. 1115-1149.
Japanese Unexamined Patent Publication No. 17661/1973 (Tokkai Syo 48-17661).

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